TotalRecall™ Full Visibility Technology provides 100% visibility into an FPGA while allowing the device to run at real-time hardware speeds.
Synplicity's TotalRecall technology will revolutionize the ASIC verification landscape
This new, patented technology dramatically improves the utility of FPGA-based prototypes as ASIC verification vehicles by giving designers the ability to rapidly find and fix bugs in RTL; the environment in which they are most familiar. This revolutionary, patented technology can capture all signal states within a design and automatically export this data to a standard HDL simulator where the user can replay the sequence that led to the problem as many times as necessary until a solution is found. What makes this technology exceptionally powerful is its ability to embed assertions in the design, find errors (as a result of the failing assertions) in a live FPGA and eventually trace the bug in a familiar logic simulator environment with complete visibility of signal states.
The combination of FPGA-based prototyping, assertion synthesis to hardware and the TotalRecall technology will enable designers to find bugs far more quickly, and with more confidence than by using any other method. The TotalRecall technology allows access to debug visibility that meets or exceeds that of an emulator, while running at speeds of 10× to 100× faster.
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