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SRAM_1x1 |
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SRAM_1x1, Synplicity's High-performance ASIC Prototyping System contains a synchronous SRAM subsystem. Memory sizes of 9 to 144 Mbits are available, with bus widths of 36 or 72 bits.
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| Features: |
- Form factor: 1x1 (occupies one daughter board connector)
- Mounted with 1-4 JEDEC standard ZBT, FT, pipelined or other versions of synchronous SRAM devices
- Maximum available clock speed is 250 MHz
- Input clock is sent back to the motherboard through the dedicated clock pin (A60)
- Runs on 3.3 Volt powered HAPS system
(some configurations will work with 2.5V as well)
- "Top side" connectors allows up to 5 SRAM_1x1 to be stacked
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| Contact us about HAPS:
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"We have 3000 signals between two FPGAs, and it runs smoothly! This was achieved by HAPS great I/O flexibility and Certify's pin multiplexing feature."
- Mihai Munteanu, Development Engineer, Philips Semiconductors in Zürich, Switzerland
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