Certify Synplify Premier Identify Pro HAPS
 

Literature
Success Stories
Synplicity Customers
HAPS Terms & Conditions
Motherboards ±
Motherboards ±
HAPS-54
HAPS-52
HAPS-51
HAPS-34
HAPS-32
HAPS-31
Memory Boards ±
Memory Boards ±
DDR_1x1
DDR2_1x2
GDDR_1x1
FLASH_1x1
SDRAM_1x1
SRAM_1x1
I/O Boards ±
I/O Boards ±
ADC_1x1
DVB-OUT_1x1
DVI_1x1A
ETH_USB_1x1
GBx1_1x2
GEPHY_1x1
LCD1_1x1
PCIE-1-KIT
PCIE-1-LBI
PCIE-BP
PCIX
Adapter Boards ±
Adapter Boards ±
CTI_2x2
HAPS_CMI
MICT_1x1
PD_1x2
Interconnect
Boards & Cables ±
Interconnect
Boards & Cables ±
CON_1x1
CON_1x2
CON_2x1
CON_2x2
CON_CABLE
CON_CABLEX
Miscellaneous ±
Miscellaneous ±
BIO1
CONF30
LAB_1x1
STB1_1x1
STB2_1x1
TERM-TOP_1x1
HapsMap
Metal Cases


Site Search

 

Your Email:

SDRAM_1x1
 
SDRAM_1x1

SDRAM_1x1, Synplicity's High-performance ASIC Prototyping System contains two independent banks of 8M by 32 bit SDRAM, and a programmable clock generator.

 Features:
  • Form factor: 1x1 (occupies one daughter board connector)
  • The SDRAM devices used are Samsung K4S281632 or equivalents, two per bank
  • SDRAM clock is driven by a programmable on-board oscillator or from the motherboard
  • The selected clock is sent to the motherboard through the dedicated clock pin (A60)
  • "Top side" connectors allows up to 3 SDRAM_1x1 to be stacked
  • Runs on 3.3 Volt powered HAPS system
Contact us about HAPS:

 

"We have 3000 signals between two FPGAs, and it runs smoothly! This was achieved by HAPS great I/O flexibility and Certify's pin multiplexing feature."

- Mihai Munteanu, Development Engineer, Philips Semiconductors in Zürich, Switzerland
 
Confirma banner
 

Home Products Downloads Literature Support Training Partners Corporate Contact Us
Copyright © 2008
Synplicity, Inc.
Privacy Policy