|
 |
 |
HAPS-54 (Virtex-5) |
|
| |
 |
HAPS-54, Synplicity's High-performance ASIC Prototyping System is designed for all ASIC prototyping
needs, including HW/SW co-development, proof-of-concept
studies, IP development and end user evaluations. The
flexibility allows the same board to be reused in several
projects or configurations by replacing daughter boards
containing I/O and custom subsystems.
The 26-layer board is carefully designed for maximum
performance, with respect to signal integrity, speed
and other critical issues.
|
 |
 |
|
| Features: |
- 4 Xilinx Virtex-5 LX330 devices in FF1760 packages
- 8 million ASIC gates on one HAPS-54 board
- Signaling rate: 1 Gbps LVDS, 600 Mbps single-ended
- 3632 signals for I/O and inter-FPGA connection
- 2856 I/Os in 24 HapsTrak II connectors
- Single-ended or differential
- 736predefined inter-FPGA connections
- 466 fixed
- 32 available for SelectMap configuration
- 238 available in four HapsTrak II connectors for expansion to other motherboards
- 40 GPIOs
- 2 external differential clock inputs to each FPGA
- 16 global clocks, sourced externally or generated on-board
- 2 PLLs, one single ended and one differential
- 208 local clocks – differential or single-ended
- 3 on-board programmable clock generators
- Configuration via JTAG, on-board Flash PROMS, SelectMAP or optionally from a CompactFlash card
- 13 VCCO regions
- Each region can individually be adjusted to: 3.3, 2.5, 1.8, 1.5 or 1.2 V or sourced externally for other voltages
- On-board temperature and voltage watchdog
- Temperature controlled fan drivers
- Built-in self-test suite
- Battery backed-up encryption key
- Single 5V supply voltage
|
| Contact us about HAPS: |
|
|
"We have 3000 signals between two FPGAs, and it runs smoothly! This was achieved by HAPS great I/O flexibility and Certify's pin multiplexing feature."
- Mihai Munteanu, Development Engineer, Philips Semiconductors in Zürich, Switzerland
|
| |
 |
| |
| 
|
|
Products 