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HAPS-34 (Virtex-4) |
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HAPS-34, Synplicity's High-performance ASIC Prototyping System is designed for all ASIC prototyping needs, including HW/SW co-development, proof-of-concept studies, IP development and end user evaluations.
The flexibility allows the same board to be reused in several projects or configurations by replacing daughter boards containing I/O and custom subsystems. The 20-layer board is carefully designed for maximum performance, with respect to signal integrity, speed and other critical issues.
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| Features: |
- 4 Xilinx Virtex-4 devices, either 4VLX100, 4VLX160
or 4VLX200 in FF1513 packages
- 3-6 million ASIC gates on one HAPS-34 board
- Signaling rate: 1 Gbps LVDS, 600 Mbps single-ended
- 3274 signals for I/O and inter-FPGA connection
- 2856 I/Os (LVDS as an option) in 24 HAPS connectors
- 358 predefined inter-FPGA connections
- 40 GPIOs
- 20 global signals
- Over 900 possible signals between pairs of FPGAs
- 8 (4 LVDS) clocks for synchronizing multiple motherboards
- 20 global clocks, sourced externally or generated on-board
- All clocks can be sourced from the FPGAs
- Two on-board programmable clock generators
- 192 local clocks – differential or single-ended
- 9 VCCO regions
- Each region can individually be adjusted to: 3.3, 2.5, 1.8 or 1.5 V or sourced externally for other voltages
- On-board temperature and voltage watchdog
- Configuration via JTAG or CompactFlash (CONF30)
- Configuration status available as an input to the FPGAs
- Built-in self-test suite
- Battery backed-up encryption key
- Single 5V supply voltage
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| Contact us about HAPS:
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"We have 3000 signals between two FPGAs, and it runs smoothly! This was achieved by HAPS great I/O flexibility and Certify's pin multiplexing feature."
- Mihai Munteanu, Development Engineer, Philips Semiconductors in Zürich, Switzerland
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