|
 |
 |
HAPS-32 (Virtex-4) |
|
| |
 |
HAPS-32, Synplicity's High-performance ASIC Prototyping System is essentially a half sized HAPS-34.
HAPS-32 is designed for all ASIC prototyping needs, including HW/SW co-development, proof-of-concept studies, IP development and end user evaluations.
The flexibility allows the same board to be reused in several projects or configurations by replacing daughter boards containing I/O and custom subsystems. The 20-layer board is carefully designed for maximum performance, with respect to signal integrity, speed and other critical issues.
|
 |
 |
|
| Features: |
- 2 Xilinx Virtex-4 devices, either LX100, LX160 or LX200 in FF1513 packages
- 1.5–3 million ASIC gates on one HAPS-32 board
- Signaling rate: 1 Gbps LVDS, 600 Mbps single-ended
- 1650 signals for I/O and inter-FPGA connection
- 1428 I/Os (LVDS as an option) in 12 HAPS connectors
- 172 predefined inter-FPGA connections
- 40 GPIOs
- 10 global signals
- 2 differential clocks
- 10 global clocks, sourced externally or generated on-board
- All clocks can be sourced from the FPGAs
- On-board programmable clock generator
- 96 local clocks – differential or single-ended
- 6 VCCO regions
- Each region can individually be adjusted to: 3.3, 2.5, 1.8 or 1.5 V or sourced externally for other voltages
- On-board temperature watchdog
- Configuration via JTAG or CompactFlash (option, see CONF30)
- Configuration status available as an input to the FPGAs
- Built-in self-test suite
- Battery backed-up encryption key
- Single 5V supply voltage
|
| Contact us about HAPS:
|
|
|
"We have 3000 signals between two FPGAs, and it runs smoothly! This was achieved by HAPS great I/O flexibility and Certify's pin multiplexing feature."
- Mihai Munteanu, Development Engineer, Philips Semiconductors in Zürich, Switzerland
|
| |
 |
| |
| 
|
|
Products 