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GEPHY_1x1
 
GEPHY 1x1

GEPHY_1x1, Synplicity's High-performance ASIC Prototyping System contains two Gigabit Ethernet PHY devices, with fully featured physical layer transceivers that supports 10BASE-T, 100BASE-TX and 1000BASE-T Ethernet protocols. GEPHY_1x1 implements:

  1. Standard Media Independent Interface (MII)
  2. Gigabit Media Independent Interface (GMII)
  3. Reduced Gigabit Media Independent Interface (RGMII)

    Two GEPHY_1X1 boards can be stacked to get four Ethernet channels on a single HAPS connector.

 Features:
  • Form factor: 1x1 (occupies one daughter board connector)
  • Two 10/100/1000 copper Ethernet I/O links
  • Fully compliant with IEEE 10BASE-T, 100BASE-TX and 1000BASE-T specifications (802.3u, 802.3z, 802.3ab)
  • Integrated PMD sublayer featuring adaptive equalization and baseline wander compensation according to ANSI X3.T12
  • IEEE 802.3u Auto-Negotiation and Parallel Detection
  • Supports Auto-MDIX at 10, 100 and 1000 Mb/s
  • Management port (MDC/MDIO)
  • Two master clocks of either 25MHz or 125MHz
  • LEDs indicating activity, link10, link100, link1000 and full/half duplex
  • Compatible with HapsTrak v1 (HAPS-10), v2 (HAPS-20) and v3 (HAPS-30)
  • Runs on HAPS systems at 2.5V or 3.3V
 
Contact us about HAPS:

 

"We have 3000 signals between two FPGAs, and it runs smoothly! This was achieved by HAPS great I/O flexibility and Certify's pin multiplexing feature."

- Mihai Munteanu, Development Engineer, Philips Semiconductors in Zürich, Switzerland
 
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