The Amplify® ISSP® Pro
product is the only NEC Electronics recommended and certified custom
physical synthesis, floorplanning, and analysis solution for ISSP
-1 and ISSP-90 structured ASIC architectures. From a single environment,
a designer can create ISSP floorplans, perform ISSP-specific physical
synthesis, interactively analyze and modify the design, and complete
a legally placed gates design ready for handoff to NEC Electronics.
The software is the result of 2 years of joint development between
NEC Electronics and Synplicity. The Amplify ISSP Pro solution provides
an integrated flow with NEC Electronics' OpenCAD software, and
reads ISSP physical and logical libraries from the NEC Electronics
ISSP design kit.
Highest Quality of Results and Predictability with Custom Physical Synthesis ISSP silicon masters have a very specific architecture that requires custom physical optimization if your design is to meet timing in the smallest possible area. Unlike traditional ASIC synthesis tools, Amplify ISSP Pro software uses architectural knowledge and carefully monitors and balances use of the specific physical resources available on the ISSP master. It creates a legal, routable, optimized placement for your design. Custom optimization algorithms implement a design with predictable performance, in the smallest possible area, saving you time and money.
Knowledge of available silicon resources, design rules, and the location of obstacles combined with careful consideration of utilization levels, wire lengths, and routing resources, allows the Amplify ISSP Pro solution to create a circuit topology that has predictable routing delays and a design that can be routed. Synplicity's patented SNAP™ technology anticipates possible timing violations that might occur due to long routes along critical paths. The SNAP technology adjusts the circuit topology to remove the problem.
Close timing yourself and achieve a single-pass hand-off to NEC Electronics
Amplify ISSP Pro software combines finely tuned logic and placement optimization algorithms with an ability to measure true timing and area from a legal and routable placement. The benefits are:
Timing from your placed gates design closely correlates with the final routed design — you can close timing yourself and need only perform a single handoff to NEC Electronics. You no longer need to budget huge timing margins at the time of handoff or iterate with trial layouts.
Your placement is completely legal and free of signal integrity/DSM issues – the placement abides by ISSP design rules. Clock trees are legally configured. Amplify ISSP Pro software’s patented SNAP algorithms anticipate and mitigate unpredictable routes, preventing signal integrity issues or design rule violations downstream.
Exceptional performance, density, and productivity with floorplanning and physical analysis
The Amplify ISSP Pro solution provides an easy to use floorplan creation and editing environment from which an individual or teams of designers can quickly assemble, analyze, and improve their design.
Macros and memories can be easily and legally placed within the floorplanner.
Groups of designers can work on individual portions of the design in parallel and combine them using a block-based design flows, designating non-overlapping, top-level bounding boxes within the floorplan.
Congestion hot spots can be identified and fixed upfront using the Amplify ISSP Pro product’s congestion and row/utilization map. A plethora of annotated schematic features, critical path displays, and reports are provided.
Physical constraints can be set to further improve results.
