Home > Partners > EDA Partners

Synplicity's EDA Partners
Synplicity works very closely with specific EDA vendors who's technologies complement Synplicity's software and system solutions for the design and verification of semiconductors. These vendors are officially enlisted in our Strategic Access Partner Program. Synplicity provides EDA vendors access to Synplicity's  software products to ensure quality in the interface between technologies and for joint promotional purposes.

These close partnerships allow users of Synplify synthesis technology to better interface with other key technologies in the PLD design flow. This includes, but is not limited to, graphical entry, simulation, and physical design.

Aldec For the last five years, Aldec has dedicated its efforts to doubling the productivity of the current HDL-based design verification tools. Today, Aldec offers common kernel simulation products for mixed VHDL, Verilog, SystemC and EDIF designs. Aldec's comprehensive product line allows designers to simulate larger designs in less time, utilizing either UNIX, Linux, or Windows NT platforms.

Cadence Design Systems is the largest supplier of electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics based products. With approximately 4,800 employees and 2002 revenues of approximately $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN.

CoWare provides electronic system-level (ESL) EDA software and services to system-on-chip (SoC) designers in convergence product applications who struggle to create the right design right the first time. CoWare's C/C++ and SystemC-based solutions are proven to help companies cut SoC design time in half and get their products to market faster. CoWare's platform-based design methodology, combined with our patented Interface SynthesisT technology, helps designers perform architectural exploration, HW/SW co-design, system integration and verification and HW/SW co-verification. CoWare's ConvergenSCT product family is the EDA industry's first system-level design solution using a common infrastructure for both design and verification, built expressly for SystemC. CoWare's LISATek technology is a unique solution that makes the development of customer-specific embedded cores a fast, cost effective and secure endeavor. CoWare's SPW is a system-level design tool that accelerates the design and development of complex, algorithm-intensive digital signal processing (DSP) systems.

CriticalBlue provides embedded system design automation tools. Its Cascade tool is an automated co-processor synthesis solution that boosts system processing performance by creating a loosely coupled programmable co-processor. The use of Cascade accelerates the execution of compiled binary executable software code off-loaded from the Central Processing Unit (CPU). The resulting co-processor thus requires no compiler, and supports the continued use of the established CPU and its associated investment in design tools and infrastructure. Cascade can be implemented in system-on-chip, system-on-FPGA, and structured ASIC.

Forte Design Systems addresses the design and verification needs of GigaScale-class electronics systems, as well as traditional SoCs, ASICs, and FPGAs. GigaScale systems have characteristics that generally include high dataflow, high simulation speeds, gate counts reaching billions of gates, multiple design and verification languages, and embedded processors. These GigaScale systems require a new level of design and verification abstraction, flexibility, and integration-both among Forte's GigaScale tools and with third-party implementation tools such as Synplify software.

Impulse C allows software programmers and FPGA designers, using its CoDeveloper product, to describe and accelerate parallel algorithms for image processing, DSP, encryption and other processing-intensive applications using standard C language. Software programmers are given independent access to a wide range of FPGAs by allowing hardware accelerators to be compiled directly from C software descriptions. CoDeveloper allows software programmers to use standard C development tools for algorithm verification and desktop simulation to generate synthesizable hardware descriptions for selected C subroutines and processes.  The final output is exported to Synplicity tools for synthesis.

The MathWorks is the leading developer and supplier of technical computing software in the world. Employing more than 1,000 people, The MathWorks was founded in 1984 and is headquartered in Natick, Massachusetts, with offices and representatives throughout the world. The company has been profitable every year since its inception and is privately held.

Prover Technology is a worldwide leading provider of formal verification solutions. The company's product portfolio includes Prover eCheck, an FPGA and ASIC equivalence checker with unparalleled ease of use and automation. Founded in 1989, Prover Technology is the most experienced company in the field of automated formal verification. The company has offices in Silicon Valley, France, and Sweden (HQ).

Synopsys delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers.

SynTest develops and markets advanced design-for-test (DFT) and design-for-debug/diagnosis (DFD) tools throughout the world, to semiconductor companies, system houses, and design service providers. SynTest's products improve an electronic design's testability and fault coverage and result in not only reduced defect levels with lower tester time, but also reduced slippage in time-to market.

Y Explorations develops ESL software tools that enable systems designers to explore and optimize hardware at the architectural and behavioral levels by synthesizing from ANSI C to RTL. The eXCite C behavioral synthesis tool produces VHDL or Verilog ready for logic synthesis with Synplify Pro. Behavioral synthesis automates the tedious and error prone process of manually converting C algorithms into RTL.