Siemens Medical Solutions brings together innovative
imaging equipment, information technology, management consulting
and services to help customers achieve tangible, sustainable
clinical and financial outcomes.
Using Synplify Pro software meant the designers at Siemens
could quickly and easily implement the logic for the high
speed data links in their CT scanner, where before their existing
tools had not managed to synthesise the design. With high
speed links using the same timing criteria as technologies
such as InfiniBand, the ability to synthesise and route the
logic that supports the SERDES interfaces is a vital requirement
of design tools.
The ETAS Group evaluated the Identify product during the
development of the ES1325, a digital I/O board targeted at
rapid-prototyping applications for the ES1000 system. The
ES1325 supports 16 digital output channels,16 digital input
channels, as well as two trigger channels. The individual
channels can be configured independently in a flexible way
in order to cover all possible use cases for measuring and
generating digital signals. The corresponding functionality
is implemented in the FPGA, which contains a large number
of custom IP cores connected by an internal bus. The custom
IP cores were synthesized using the Synplify Pro® advanced
FPGA synthesis solution, the standard tool in the ETAS development
process for VHDL synthesis.
"I always wanted to test the Identify product since the technology
looked very promising," says Andreas Grävinghoff, senior
product engineer at ETAS. The opportunity for the Identify
solution came as one of the ES1325 prototypes showed intermittent
failures in the ES1000 system. Immediately after receiving
the evaluation license, the FPGA was instrumented, re-implemented,
and debugged. "I was impressed with the intuitive user-interface,
the powerful trigger capabilities, and the fact that there
was no impact on FPGA performance and no changes to the design
flow. The Identify solution simply works as advertised," said
Grävinghoff.
e-trees.Japan, founded in 2000, supplies advanced networking
products. Our latest product, freeocean provides customer with
all-in-one package of load balancer, cache server and web server,
which will reduce TCO for networking and increase your web2.0
bussiness dramatically. For more information, visit http://e-trees.jp
(Japanese) or contact us at general@e-trees.jp.
"We knew good reputation for Synplicity products, so
we were confident to prove it. FPGA devices are essential
to our systems, and, Synplify plays a key role in our design
flow. We are considering more Synplicity products for our
future development."
Satoshi Funada
Senior Managing Director and Chief Research Officer
e-trees, Japan
Foundry Networks, Inc. is a leading provider of high-performance
enterprise and service provider switching, routing and Web
traffic management solutions including Layer 2/3 LAN switches,
Layer 3 Backbone switches, Layer 4 - 7 Web switches and Metro
Routers.
Foundry Networks employs the Identify™ RTL debugger
from Synplicity to quickly pinpoint bugs in its FPGA designs.
Three occasions to use it have arisen in the tool’s
first six weeks at the company, and in every case the problem
was found and fixed in a day or less. With the labor-intensive
approach of the past, debugging would have taken between ten
and a hundred times longer.
“The Identify product has been a very useful addition
to our CAE tools at Foundry. This tool has made a substantial
improvement in our FPGA bug discovery/closure process.”
After successfully using Synplify Pro for ASIC prototyping
several years already, Hyperstone has switched to Synplify
Premier. During the process of pure ASIC development, IP development
became more and more important for us. Our customer demands
have changed and early individual solutions based on low-cost
FPGAs are becoming the target in parallel to the process of
ASIC prototyping. With Synplify Premier, we achieved to develop
a more automized and consistent FPGA flow. Combining logic
synthesis and physical synthesis into the same tool helped
us to achieve our targets. We can now control the complete
flow from one single tool with more accurate and consistent
results before performing the final P&R with the backend
tool chain.
Thorsten Last,
Director of Research & IP Development,
Hyperstone AG
IMEC is a world-leading independent research center in
nanoelectronics and nanotechnology. Its research focuses on
the next generations of chips and systems, and on the enabling
technologies for ambient intelligence. IMEC’s research
bridges the gap between fundamental research at universities
and technology development in industry. Its unique balance
of processing and system know-how, intellectual property portfolio,
state-of-the-art infrastructure and its strong network of
companies, universities and research institutes worldwide
position IMEC as a key partner for shaping technologies for
future systems.
IMEC used Synplify Premier software from Synplicity to demonstrate
that its C-programmable reconfigurable processor architecture
ADRES is feasible for use in portable wireless multimedia
devices.
"It is clear that for 90 nm FPGAs and beyond the timing
closure offered by Synplify Premier is crucial."
For MIPS Technologies, one of the world's leading providers
of processor IP, debugging is a critical element in the design
of its industry-standard processor cores. In 2006, MIPS Technologies
began using the Identify RTL debugging product from Synplicity
in the validation flow, and quickly achieved success with
a particularly challenging class of bugs. Debugging a class
of problems with the Identify tool has proven to be extremely
fast, simple and effective.
“Some of the bugs that come up in real life today require
that we monitor a thousand signals or more at the same time.
Thanks to the Identify tool, we're able to tackle and fix
these complex bugs.”
Sandesh Bharadwaj, Staff Engineer, MIPS Technologies
In early 2005, Signalcrafters launched the design of its
latest test and calibration product, the Model 120, which
incorporates an FPGA to perform the design's many DSP functions.
The specification called for generating nine sine/cosine and
noise waveforms simultaneously, four of which had variable
frequencies — a task that took four devices in the past.
Using the software environment originally in place, engineering
could not get the design to work. "We tried everything we
could think of," said Alan Jayson, Product Engineer. "...we
decided we'd better find another solution. I'd heard good
things about Synplicity from friends in the industry, so we
decided to give the Synplify Pro solution a try. It worked
perfectly, right out of the box. It's so intuitive I didn't
even need to read the documentation."
"Synplify Pro software solved all the problems we'd been
having and allowed us to meet every design goal," Jayson continued.
"It even reduced the FPGA's area by 25 percent — an
unexpected bonus that's cutting our FPGA costs in half. The
Synplify Pro solution did a great job of optimizing the use
of chip resources, and it showed us how far off the mark our
existing software was."
Pentland Systems provides comprehensive coverage of modern
Tx/Rx systems. The product line includes high-speed digital
receivers and transmitters as well as intelligent analog input/output,
sigma delta, synchro and resolver modules.
Pentland Systems took advantage of Synplify DSP in two ways
to capitalize on a substantial business opportunity. The Synplicity
solution first demonstrated that an FPGA was capable of meeting
the customer’s DSP requirements, and then filled a vital
role in the flow that synthesized the actual design. Synplify
DSP introduced an all-important 25% area reduction as well
as a 75% performance improvement. Just one month after their
initial discussions, Pentland and its customer held a working
product in their hands.
Because of Synplify DSP’s many benefits for FPGA-for-DSP
designs, it has become a vital tool in Pentland’s design
arsenal. And because it can quickly determine whether specific
applications are feasible, it has become just as valuable
as a sales and marketing tool.
“We were intrigued to give Synplify DSP a try because
it provides the RTL modification capability we needed, and
also because it's from Synplicity, a firm we'd come to respect
highly after several years of success with their Synplify
Pro® product. If it came from a lesser company we might
not have considered it.”
Kordian Kurowski, Sr. VLSI Design Engineer at Creative
Labs ATC is using Certify to split and synthesize VLSI ASIC
prototypes into multiple of the largest available Xilinx FPGA's.
The design contains IP, various types of RAM's, multiple clocks,
and many complexities. Certify handles all these issues and
is closely tied with Xilinx's dynamic developments.
"The way Certify works for me is it takes a board file listing
all traces between the FPGA's, reads in mixed VHDL and Verilog,
allows to evaluate very easily how to partition the design,
automatically assigns internal signals going between the FPGA's,
and generates separate pairs of EDF netlist and constraints
for each FPGA. I run this in a script, followed by Xilinx,
and get very consistent results for each iteration of the
design. The support team goes out of the way to help with
difficult implementation issues, takes suggestions for new
features, and communicates what's to come in new releases."
Emulex Corporation creates enterprise-class products that intelligently connect storage, servers, and networks. The world's leading server and storage providers rely on Emulex award-winning HBAs, intelligent storage platforms and embedded storage products, including switches, bridges, routers and I/O controllers, to build reliable, scalable, and high performance storage and server solutions. Emulex is listed on the New York Stock Exchange (NYSE:ELX) and corporate headquarters are located in Costa Mesa, California. News releases and other information about Emulex Corporation are available at http://www.emulex.com.
"Certify helps us streamline our design partitioning process," Craig McElheny, Senior Principal Engineer, Emulex Corporation. "It automates the partitioning process, so you can simply define the top levels for each FPGA and move modules back and forth to achieve the optimum gate and signal count. Certify automatically handles the muxing for you!"
Philips Semiconductors, headquartered in Eindhoven, The
Netherlands, is one of the world's top semiconductor suppliers.
Following extensive evaluation, Philips decided to use the
Certify® tool from Synplicity. Certify software can transparently
partition a design without any tool-specific modifications
to the code, targeting not only multiple FPGAs but different
kinds of target hardware as well. The first verification project
executed following the introduction of this approach was a
success. According to Rolf Singer, “The integration
between the emulator and the prototyping board was achieved
in one week instead of four weeks as was originally scheduled.”
Apart from the hardware environment, this is achieved by the
tool’s transparent and stable operation during the partitioning
process. Says Singer, “It is easy to see where the circuits
are placed and to which FPGA they are assigned. In addition,
the Certify software can automate large sections of the design
even though manual intervention is always possible. With the
exception of VHDL configurations, the Certify product was
able to use the unmodified code originally written for the
design. No modifications dictated by the FPGA or the tool
were necessary for the partitioning process or for RTL synthesis.”
This integrated solution is extensively used by Philips. “It
operates reliably and smoothly and offers much better performance
than any simulator,” comments Singer.
ATI Technologies Inc. is a world leader in the supply of
graphics, video and multimedia products for desktop, workstation
and notebook PCs, digital televisions, cell phones and game
consoles.
ATI Technologies used the Certify® ASIC prototyping solution
from Synplicity to synthesize and verify the design of a graphics
chip for next-generation handheld devices. The Certify tool
partitioned the complex design among four FPGAs and filled
a vital role in debugging the design. FPGA prototyping with
the Certify product provided many advantages over traditional
hardware emulation — running code up to 100 times faster,
allowing prototype boards to be built at one-tenth the cost,
FPGA prototyping also helped identify timing-sensitive bugs
that could have prevented first silicon success. Now ATI has
adopted the Identify® RTL debugger from Synplicity as
well, further fortifying its arsenal of debugging tools. The
Identify tool’s speed, power, and ease of use will help
the company bring new graphics chip technology to the market
even faster.
“Prototyping with FPGAs is a good solution for the
problems that arise in designing our ASICs, and the Certify
software approach is a good way to go, mainly due to the automated
partitioning. For large, complex designs, it is less work,
effort, and money versus hand partitioning. This is why we
use the Certify product exclusively in this specific part
of our design flow.”
STMicroelectronics is a global leader in developing and
delivering semiconductor solutions across the spectrum of
microelectronics applications.
STMicroelectronics has taped out a project that maps automatically
generated code onto FPGAs using the Certify® solution
from Synplicity. ST’s Dynamic Verification Team demonstrated
that in principal the design can move from a high level language
all the way to the gate level with no human intervention —
with great savings in time-to-market and engineering labor.
ST found the Certify product to be the only tool on the market
that provides the FPGA synthesis capabilities needed in this
flow. Because of its unique combination of important features,
and because Synplicity provides quality support to match,
the group has made the Certify solution its standard.
“The Certify tool includes in a single environment
features like Verilog-VHDL mixed language, partitioning, clock-gating
handling, and a fast synthesis engine. Even if you can find
some of these features in other tools, they are not available
in a single environment.”
