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The ASIC Prototyper
A Newsletter for the ASIC Community
Build your own ASIC prototype using off-the-shelf hardware modules |
HAPS-54
The second member in the new ASIC Prototyping Family with Xilinx Virtex-5 Devices designed to work with Synplicity's Total Recall™ technology
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| Six weeks after the release of HAPS-52 we are proud to announce the second member in this family, based on Xilinx Virtex-5 devices.
HAPS-54 is roughly twice the size of HAPS-52. The board is equipped with four Virtex-5 LX330 devices, which gives a capacity of about 8 million ASIC gates.
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More boards in the HAPS-50 series will be available within two months. All boards will support the HapsTrak II standard.

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- 3636 signals for I/O and inter-FPGA connection
- 16 global clocks, sourced externally or generated on-board
- 2 external differential clock inputs to each FPGA
- 208 local clocks – differential or single-ended
- 3 on-board programmable clock generators
- 13 VCCO regions
Read More... |
HapsTrak II
as HapsTrak I, but with extended power to daughter boards, and including remote identification, setup, and monitoring of the complete HAPS system fully compatible with HapsTrak I |
Seminar
ASIC Verification with FPGA Prototyping a joint seminar between HARDI, Synplicty and Xilinx
This technical and educational half day seminar will provide you with practical information on achieving rapid and comprehensive ASIC Verification using multi-FPGA prototypes.
If you would like this seminar in your area, please let us know at: |



Register Here...
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See HAPS being used as an emulation platform
Visit Aldec at DAC
Register here...
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| COMING SOON |
- More motherboards in the HAPS-50 series
- SCE-MI
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