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Thank you for your interest in Synplicity's FREE Synplify Pro / Synplify DSP Workshop on July 2, 2008 and July 3, 2008 at the Computer Engineering Laboratory (http://ce.et.tudelft.nl/) at Technical University of Delft (http://www.tudelft.nl/)

The Workshop will begin at 9:00 AM and be held in EEMCS Examination and Laboratory Class Building (Building #35, Cornelis Drebbelweg 5 see TUD maps | Campus Map | Map Legend).

EEMCS Examination and Laboratory Class Building (Building 35)
Cornelis Drebbelweg 5
2628 CM Delft
The Netherlands
Reachable from train station ‘Delft’ by bus 129. Get off at bus stop ‘Drebbelweg’.

Lunch can be purchased during the lunch break at Aula Restaurant located in the Aula Congress Centre (Building #20, Mekelweg 5 see TUD map | Campus Map | Map Legend)

Aula Congress Centre (building 20)
Mekelweg 5
2628 CC Delft
The Netherlands
Reachable from train station ‘Delft’ by bus 69. Get off at bus stop ‘Aula’.

For Hotel & Transportation Information, click here.

Please fill out the form below and press the 'Register' button. Once you send in your registration information, we will confirm your seat in the workshop via e-mail and send you more detailed information. Seating is limited, reservations will be on a first come first served basis.

Day 1: Technical Tutorial – Synplify Pro
This course first introduces the Synplify Pro tool. The course will familiarize students with the FPGA design flow utilizing features of the Synplify Pro product, enabling them to actively create designs using the Synplify Pro product. The course then expands on these concepts to focus on complex design techniques, debugging and high performance design.  All topics covered in this course will aid the student for day 2 – ESL Synthesis Tutorial for DSP Algorithm Implementation.

Introduction
Getting Started
Timing Optimizations
Design Analysis and Debugging
Vendor Specific Topics
Formal Verification Flow with Synplify Pro
Synplify Premier Physical Synthesis


Instructor: Philipp Jacobsohn
Philipp Jacobsohn has been a Senior FAE at Synplicity since March 2001, during which time he has been instrumental in the development of customer bases in the Germany, Austria, Switzerland, and BeNeLux area.

Since then, he has helped establish Synplify Pro and Synplify Premier as the market leading FPGA Synthesis tools whilst also managing the introduction of all other FPGA, ASIC Prototyping, and ESL products into these customer bases.

Philipp has been working with FPGA technologies since 1994, whilst supporting Altera technologies within the SEI-Elbatex corporation.

Day 2: Technical Tutorial – ESL Synthesis Tutorial for DSP Algorithm Implementation
New tools for implementing DSP algorithms into FPGAs and ASICs are making it much faster and easier to go from high level models into silicon, including the ability to perform architectural exploration and evaluate speed and area tradeoffs quickly.  This session provides a tutorial on using Synplify DSP, how some of the commmonly used optimizations work and how they can be applied automatically to high-level algorithm models built with Synplicity's Synplify DSP library and Mathworks Simulink. The seminar will include examples in wireless communications and will benefit engineers who are interested in:

  • Methods to rapidly create implementable aglorithm models
  • Architectural exploration and analysis
  • Creating portable algorithmic IP that are re-usable across FPGA and ASIC technologies

Introduction to Synplify DSP Flow
Architectural Exploration Overview
Signal Data Types
Vector Support
Multi-Rate Modeling
Architectural Synthesis
Micro-Architectural Optimizations
Retiming
Folding and Multi-Channelization
Advanced Features and IP Functions

 

Instructor: Pierluigi Lo Muzio

Pierluigi Lo Muzio graduated in Electronics Engineering at the University of Pisa (IT) and joined Philips Research in 1988. After 1 year working on HD-TV in Nat Lab Eindhoven, Pierluigi continued in Monza (IT), actively contributing to several European Research Projects in the role of DSP Project Leader.  Pierluigi has spent many years working with well known European firms such as ST. Microelectronics and Thomson Multimedia as DSP Architect and Project Leader in the fields of optical recoding, wireless systems, digital televisions, and FPGAs.   Pierluigi has authored several papers presented at International Conferences and has won some patents in the DSP field.  In 2005 Pierluigi joined Synplicity as DSP Specialist, in the European Sales Headquarter, Munich.  Currently Pierluigis role is to manage the deployment of the new Synplicity ESL products in the European market.

Registration Form:
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Please complete the following questions so we can better serve your needs:*

Synplicity Tools will be used for (check all that apply):
Undergraduate Work
Graduate Work
Undergraduate and Graduate Courses
Research
Commercial

Which of the following do you primarily use for creating models and algorithm designs?:
Matlab only
Simulink and Matlab
C
None of the above

Which technologies do your projects primarily target?:
Altera FPGAs
Actel or Lattice FPGAs
Xilinx FPGAs
ASICs Only
ASIC products with FPGAs for prototyping/development

What are the primary market segments that your products target?:
Wireless Telecom
Military/Aerospace
Consumer Wireless
Consumer/Professional Video or Audio
Scientific/Medical/Industrial
Computing/Storage

Do you have students interested in intern or full time positions at Synplicity?
Yes
No

Would you be interested in writing article(s) to be published in Synplicity’s quarterly newsletter – The Syndicated®?
Yes
No

Would you like to subscribe to Synplicity's free quarterly online newsletter, The Syndicated®?
Yes
No

Would you be interested in having a sales person contact you?
Yes
No

 

 

 
 
 
 
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