Synplicity®, Inc. Presents a Technical Seminar:
Prototyping as a Productive Verification Methodology

Who should attend?

• ASIC and FPGA Engineers
• System Architects
• Engineering or Technical Managers

FPGA-based Prototyping has become a mandatory step for successful ASIC/ASSP and SoC design. The use of FPGAs for ASIC or SoC design verification is no longer the "ad-hoc / assembly required" methodology it once was; It has evolved into a truly productive and high-performance ASIC verification solution.

What should you consider when deploying an FPGA-based prototyping system? And, what are the necessary steps involved in getting an ASIC design to work on an FPGA-based prototyping board? You will learn this and more during this FREE technical and educational seminar.

What You Will Get

• A closer look at the HAPS™ architecture and capabilities; System set-up and configuration; Getting the most out of a prototyping system.
• Live demonstrations of the complete flow:
  • Preparing the ASIC design for prototyping
  • Designing partitioning and implementation
  • Prototyping system configuration and bring-up
  • Debugging the design and fixing errors

Seminar Date and Location:

Dates	Locations	Times
Wednesday, August 13, 2008	Xilinx, Inc. 3100 Logic Drive Longmont, CO 80503	8:45am - 2:00pm (Lunch to be provided)

Seminar Agenda:

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