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Hardi Electronics, Inc., Synplicity®, Inc., and Xilinx, Inc. Present:
How to get more for your Verification Dollars
ASIC Verification with FPGA Prototyping
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April 26 Beaverton, OR
Kingstad Meeting Center
15450 SW Millikan Way, Beaverton, OR 97006
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This technical and educational half day seminar will provide you with practical information on achieving rapid and comprehensive ASIC Verification using multi-FPGA prototypes.
What you
will learn:
- Upcoming developments at Synplicity, Inc. & Hardi Electronics, Inc. including, Synplicitys TotalRecall Technology & Hardi’s ASIC Prototyping System (HAPS)
- How to use FPGA-based prototypes to test ASICs at real-time speed
- How using FPGA-based prototypes allows software development and debugging to happen in parallel with the design
- How to quickly assemble, test, and re-configure ASIC prototyping hardware
- The advanced hardware features of Xilinx Virtex TM-5 Multi-Platform FPGAs
- Integrated design solutions from Xilinx, and how they streamline ASIC-prototype design and verification
Seating is limited, so please Click here to register
| Seminar Agenda: |
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Registration |
| 1:30 — 2:30pm |
Hardi Electronics, Inc. Presentation:
- Hardi ASIC Prototyping System (HAPS) concept, methodology, and demonstration
- HAPS compatible IP usage, including examples
- HAPS Built-in-self-test demonstration
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Break - Hardi ASIC Prototyping Hardware Demonstration including Built-in Self Test |
| 2:45 — 3:45pm |
Synplicity, Inc. to present:
- The Certify® software methodology for partitioning and implementing large ASIC designs into HAPS
- Timing optimization of the prototype board through Certify software synthesis and analysis capabilities
- How Certify software implements multi-FPGA prototypes with no changes to the RTL source code
Achieving signal visibility for debug in the live running prototype |
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| 3:45 — 4:45pm |
Xilinx, Inc. to present:
- Virtex TM-5 Multi-Platform FPGAs
- Faster ASIC-prototype design using ISE Foundation TM advanced options
- Optional ChipScope TM Pro and PlanAhead TM tools for streamlined performance, floorplanning, and real-time verification
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| 4:45 – 6:00pm |
Reception
Hardi ASIC Prototyping Hardware Demonstration including Built-in Self Test
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Seating is limited, so please Click here to register
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Products 