Synplicity’s DATE 2007 Tutorial "DSP into FPGA will go"
Time: 12:30 – 14:00, April 18th Wednesday, 2007 Venue: Acropolis, Room Gallieni 2
Click here to Register!
One of our highlights of DATE this year will be Synplicity’s tutorial Session "DSP into FPGA will go"!
This is a unique opportunity to gain inside knowledge on the use of FPGA for DSP applications and in order to maximize the technical content, the majority of the presentation will be given by ALSE for Altera Technologies and Multi-Video Design for Xilinx Technologies. We are very proud to be working with two respected Training and Design Specialist's for FPGA. Both ALSE and MVD will cover a broad range of information regarding the DSP possibility for your designs.
In addition, Synplicity will show you details on the Synplify DSP tool which allows Algorithm-Level architects and FPGA designers to work together in the same environment in order to in optimize DSP design's for chosen FPGA's.
The tutorial will be given in English. For more information:
About the speakers Full agenda
As places are limited, please register soon in order to guarantee your seat!
Don't forget to visit our booth at DATE. You may find us at stand #M35 in the Méditerranée – Level 1 hall and get the whole picture and possibilities of our DSP, FPGA and ASIC Verification Solutions!
Please complete the following registration form to reserve your seat for this event. * fields are required.
To help us ensure the maximum relevance of our presentation for our audience, we would be very grateful if you would answer the following questions:
Which FPGA family are you likely to use for your next design? Select One Altera Cyclone Altera Cyclone II Altera Stratix Altera Stratix II Lattice ECP Xilinx Spartan-3 Xilinx Virtex IIpro Xilinx Virtex IV Other
What method do you use to create your DSP Design? (click all that apply)*
C C++ System C System Verilog Matlab M Code Simulink Blocksets Other
Which of these platforms does your company use to implement your DSP Design? (click all that apply)*
DSP Processor Component Logic in FPGA Logic in ASIC/SoC Embedded Processor in FPGA Embedded Processor in ASIC/SoC Other
In what format do you hand over your design to the implementation team?*
I don't. I implement it myself. Paper Specification only Simulation model in Simulink Simulation in C M Code Other
From 1 (novice) to 10 (expert) how would you rate your Synplicity tool knowledge? Select 1 Novice 2 3 4 5 6 7 8 9 10 Expert
Would you like to be informed of upcoming Synplicity events in your area? Check all that apply:
FPGA DSP ASIC Verification
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