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For Immediate Release

SYNPLICITY ANNOUNCES SYNPLIFY DSP ASIC EDITION

Industry’s Only DSP Synthesis Engine Targeting ASIC Designs

DATE Conference, Nice France, April 16, 2007 – Synplicity, Inc., a leading supplier of software for the design and verification of semiconductors, today announced the expansion of its ESL software offering. Following the company’s strategy of delivering technology-independent solutions, the new Synplify ® DSP ASIC Edition software allows users to automatically develop high-quality RTL code from designs specified at the algorithm level for implementation into either an FPGA or ASIC device.

The Synplify DSP ASIC Edition’s unique DSP synthesis optimizations automatically implement algorithms allowing designers to explore speed and area tradeoffs, often leading to significant area and timing improvements over hand-coded approachesThose who have used the beta product have experienced considerable advantages over traditional handcrafted flows.

“Our Synplify DSP software has been tremendously successful among FPGA users who have experienced significant quality of results benefits, and we are eager to bring the same capabilities to ASIC users,” said Andy Haines, senior vice president of marketing, Synplicity. “We believe the performance and productivity benefits offered by our Synplify DSP ASIC Edition software are so significant that it will become the technology of choice when designers implement DSP capabilities into either FPGA or ASIC hardware.”

From a single model, the Synplify DSP ASIC Edition software can automatically implement optimized architectures of algorithms into either FPGA or ASIC devices. For teams developing ASICs, the combination of Synplify DSP ASIC Edition and Synplicity’s ASIC verification product suite allows users to quickly verify their ASIC designs in FPGAs at high speed. By prototyping ASIC designs in FPGAs functional bugs can be detected more rapidly and more complex interactions can be observed due to the high operating speed (typically above 100 MHz) of the FPGA.

The software also supports third-party logic synthesis flows from Synopsys, Cadence and third-party ASIC memory IP providers. The Synplify DSP ASIC Edition software provides users with a fully integrated solution with standard ASIC flows.

Pricing and Availability

The Synplify DSP ASIC Edition software starts at $44,500 for a floating, one-year time-based license. For information about Synplicity’s Synplify DSP ASIC Edition software, contact a Synplicity sales representative or visit http://www.synplicity.com.

About Synplicity

Synplicity® Inc. (Nasdaq:SYNP) is a leading supplier of innovative software solutions that enable the rapid and effective design of Programmable Logic Devices (FPGAs, PLDs and CPLDs) that serve a wide range of communications, military/aerospace, consumer, semiconductor, computer, and other electronic systems markets. Synplicity's tools provide outstanding performance, cost and time-to-market benefits by simplifying, improving and automating key design planning, logic synthesis, physical synthesis and verification functions for FPGA, FPGA-based ASIC verification, and DSP designers. Synplicity is the number one supplier of FPGA synthesis solutions and has been rated #1 in customer satisfaction since 2004 in EE Times' Annual FPGA Customer Survey. Synplicity products support industry-standard design languages (VHDL and Verilog) and run on popular platforms. The company operates in over 20 facilities worldwide and is headquartered in Sunnyvale, California. For more information visit http://www.synplicity.com.

Forward-Looking Statements

This press release contains forward-looking statements including, but not limited to, statements regarding the performance, achievements, benefits and market position of the Synplify DSP ASIC Edition software. In some cases, you will be able to identify forward-looking statements by terminology such as “may,” “will,” “should,” “expects,” “can,” “believes” or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the actual results to differ materially from the forward-looking statements, including the performance and benefits of Synplicity’s software relative to relevant industry methods, standards, design flaws, design difficulties or other problems with the Synplify DSP ASIC Edition software, and the growth and changing technical requirements in the FPGA and ASIC markets. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K for the year ended December 31, 2006 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time, including its quarterly reports on Form 10-Q. Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement.

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Synplicity and Synplify are registered trademarks of Synplicity Inc. All other names mentioned herein are the trademarks or registered trademarks of their owners.

Synplicity Contacts

PR Contact:
Steve Gabriel
Porter Novelli
408-369-4627
steve.gabriel@porternovelli.com

Reader Contact:
Chris Eddington
Synplicity Inc.
408-215-6000
chrise@synplicity.com