For Immediate Release

Synplicity Introduces Synplify Proto Software And Expands ASIC Prototyping Solution Offerings

New Tool Combines Industry-Leading Synthesis and Debug Software To Create Company’s Second Powerful Prototyping Solution; Partners In Prototyping Program Expanded

SUNNYVALE, Calif., April 13, 2005 — In support of the rapidly growing ASIC prototyping market, Synplicity Inc. (Nasdaq: SYNP), a leading supplier of software for the design and verification of semiconductors, today announced it is expanding its FPGA-based ASIC prototyping solution offerings by introducing Synplify® Proto Single-Chip ASIC RTL Prototyping software. The Synplify Proto software is the first prototyping tool to address the need for single FPGA prototyping by integrating logic synthesis (Synplicity’s Synplify Pro® Advanced FPGA synthesis) with debugging capabilities (Synplicity’s Identify® RTL Debugger). The product also includes a utility to convert instantiated Synopsys DesignWare® IP in the customer’s ASIC RTL code to synthesizeable RTL equivalents for the FPGA.

Synplicity utilized its extensive prototyping expertise to develop the Synplify Proto software and to provide customers who prototype using a single FPGA with similar performance benefits as its industry leading multi-FPGA solution, Certify® ASIC RTL Prototyping software. The Certify software is a high-performance solution that enables ASIC prototyping across multiple FPGAs. Features of both prototyping tools include automatic recognition and translation of ASIC elements, such as gate-level components or gated-clock tree structures, to an appropriate form for FPGA implementation . The tools make ASIC prototyping significantly easier, shorten prototype development time, improve prototype performance, and enable faster time-to-market.

The Synplify Proto product was engineered so that no RTL code modifications are required to bring the entire ASIC RTL source code, or a chosen portion of it, into FPGAs for the purpose of prototyping. The designer can then use the debugging feature to find and solve problems within their FPGA prototype. This provides a closed-loop environment for error detection and error correction, dramatically shortening the time to debug the ASIC RTL. To aid in determining design functionality the tool also includes Synplicity’s HDL Analyst® design visualization environment. Designers can use this feature to cross-probe between the RTL source code and the schematics of the design. This is a critical capability for designers needing to prototype only a portion of their design.

“According to Collett International and our own market research, 30-40 percent of chip designs are prototyped using FPGAs. Due to the increasing costs and risk of error on complex ASICs, we expect this percentage to grow significantly over the next few years,” said Andy Haines, vice president of marketing at Synplicity. “We believe Synplicity is in a unique position to serve ASIC prototyping designers whether they prototype their entire design or are among the growing number who prototype just a portion of the design. With our popular Certify software, we continue to support those who prototype using multiple FPGAs. And now with the introduction of the Synplify Proto software, and the expansion of our Partner s in Prototyping program, we provide support to those who prototype using single FPGAs as well.”

Synplicity Expands Coverage of Its Partners in Prototyping Program
Synplicity also announced today it has expanded its Partners in Prototyping (PIP) program to add four companies offering both single- and multi-chip prototyping boards. The newest members of the PIP program include Altera, ARM, Flexody and SK-Electronics Co. Formed in 2002, the PIP program now boasts 12 member companies who work closely with Synplicity to verify interoperability between their single- and multi-FPGA development boards and Synplicity’s software solutions, including Certify for multi-chip boards and Synplify Proto for single-chip boards. Members of Synplicity’s Partners in Prototyping program, in addition to the four new members include: AMO GmbH, The Dini Group, EVE, GiDEL, HARDI Electronics AB, Nallatech, ProDesign and White Eagle Systems Technology. Documentation, technical information and software files are available on Synplicity's PIP web site (http://www.synplicity.com/partners/pip/index.html), allowing ASIC designers to visit a single destination for their prototyping needs. Designers can also use the web site to quickly evaluate whether an off-the-shelf board exists to meet their specific design requirements by downloading board descriptions (.vb files) from the site.

“As a member of Synplicity’s Partners in Prototyping program, we applaud the focus Synplicity has put into prototyping as a separate flow from FPGA synthesis,” said Jim Smith, Altera’s director of EDA partner relations. “Designers can now leverage Synplicity’s ASIC prototyping design flow expertise when targeting Altera’s high-density Stratix series of FPGAs.”

Shlomo Keisari, vice president of sales and marketing, GiDEL, added, “With the Synplify Proto tool, Synplicity has brought together a complete flow to the key components needed for single FPGA prototyping. As Synplicity’s Certify ASIC prototyping partner for multi-FPGA prototyping, we have already seen how much of an advantage an automated tool flow can provide to ASIC prototyping. Our customers using the single-device PROC2S board will find that the Synplify Proto software provides full support for the optimal use of the FPGA, and the combination of Synplify Proto software with GiDEL’s PROC Developers Kit will provide the PROCStar II users with full support for the optimal hardware-software integration. Our PROC boards use the industry ’s largest and fastest FPGAs and the usage of Synplify Proto will enhance their capabilities even more.”

“HARDI shares Synplicity's focus on the ASIC prototyping market, and we welcome Synplify Proto as a complete software solution for users of our single FPGA HAPS board,” said Lars-Eric Lundgren, chief executive officer, HARDI Electronics AB. “HARDI has seen the advantages system designers can gain from FPGA-based prototyping either with single or multiple FPGAs, and with Synplicity continuing to provide automation tools like Synplify Proto and Certify we expect this market to continue its growth.”

Pricing and Availability
Synplicity’s Synplify Proto software is now available. A perpetual license of the software starts at $69,000 ( U.S.). Current Synplify Pro customers, who have purchased all-vendor, floating perpetual licenses, can upgrade their FPGA synthesis software to include a perpetual license of the Synplify Proto software starting at $22,000 ( U.S.).

About Synplicity
Synplicity® Inc. (Nasdaq: SYNP) is a leading supplier of innovative synthesis, verification and physical implementation software solutions that enable the rapid and effective design and verification of semiconductors. Synplicity's high-quality, high-performance tools significantly reduce costs and time-to-market for FPGA, structured/platform ASIC and cell-based/COT ASIC designers. The company's underlying Behavior Extracting Synthesis Technology® (BEST™), which is embedded in its logical, physical and verification tools, and has led to Synplicity's top position in FPGA synthesis, now provides the same fast runtimes and quality of results to ASIC and COT customers. The company's fast, easy-to-use products support industry standard design languages (VHDL and Verilog) and run on popular platforms. Synplicity employs over 280 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, California. For more information, visit http://www.synplicity.com.

Forward-Looking Statements
This press release contains forward-looking statements including, but not limited to, statements regarding the growth of the FPGA prototyping market, Synplicity’s position in the FPGA market and the performance, achievements and benefits of the Synplify Proto software, both individually and used in conjunction with third-party products. In some cases, you will be able to identify forward-looking statements by terminology such as “may,” “will,” “should,” “expects,” “believes” or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the actual results to differ materially from the forward-looking statements, including the performance and benefits of Synplicity’s software relative to relevant industry methods or standards, design flaws, design difficulties or other problems with the Synplify Proto software, and the growth and changing technical requirements in the FPGA market. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K for the year ended December 31, 2004 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time, including its quarterly reports on Form 10-Q. Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement.

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Synplicity, Behavior Extracting Synthesis Technology, HDL Analyst, Synplify, Synplify Pro, Identify and Certify are registered trademarks of Synplicity Inc. BEST is a trademark of Synplicity Inc. All other brands or products are the trademarks or registered trademarks of their owners. DesignWare is a registered trademark of Synopsys, Inc.

Synplicity Contact:
John Gallagher
Synplicity, Inc.
408-215-6000
johng@synplicity.com

Synplicity PR Contact:
Steve Gabriel
Porter Novelli
408-369-1500 x627
steve.Gabriel@porternovelli.com