For Immediate Release

Synplicity Awarded Key Patent For Signal Integrity Technology

Latest Technology Achievement Demonstrates Company’s Continuing Commitment to EDA Innovation; Represents 18 th Patent To Date

SUNNYVALE, Calif., July 21, 2004 — Synplicity Inc. (Nasdaq: SYNP), a leading supplier of software for the design and verification of semiconductors, today announced the United States Patent Office has awarded the company a patent for technology that addresses mounting signal integrity issues in next-generation ICs. This announcement marks Synplicity’s 18 th patent for various technological innovations in the design and development of semiconductors, including FPGA, ASIC and Structured/Platform ASIC devices.

Synplicity’s latest technology achievement, patent number 6,734,472 B2, titled, “Power and Ground Shield Mesh to Remove Signal Coupling Effects,” provides users with increased signal integrity safety, better pre-route delay prediction, power and ground noise suppression and improved power distribution, guarding against unforeseen design issues that could prove costly. The technology described in the patent uses a unique two-dimensional power and ground-interconnect mesh to shield both capacitive and inductive coupling between susceptible signal lines. Synplicity believes this technology will enable the more efficient development of integrated circuits at 90nm and below.

Ken McElvain, chief technical officer at Synplicity, said, “Our broad patent portfolio is a testament to the innovation we have achieved over the past 10 years. Indeed, this newest patent further demonstrates Synplicity’s fervor for technological advancement within the EDA industry. We believe our latest patented technology will bring significant benefits to the semiconductor design community and help minimize signal integrity problems as next-generation integrated circuits are developed in smaller and lower voltage process technologies.”

Unlike current industry methods, which start at an unsafe starting point with complex, and sometimes inaccurate, modeling of aggressor and victim signal interactions followed by an attempt to repair all the signal integrity violations with ad hoc techniques, Synplicity’s patented signal integrity technique has a starting point where simple routing design rules can be used to guarantee signal integrity safety and predictability of delay. The shielding mesh, which is also used as part of the power distribution, can then be optimized while maintaining signal integrity safety.

Synplicity was granted its first patent in 2001 in the area of automatic extraction of finite state machines and has since been issued 17 additional patents in various design technology disciplines, including but not limited to, physical synthesis for both FPGAs and ASICs, ASIC prototyping and source level debugging of FPGA hardware. Synplicity continues its research and development efforts with over 30 additional patents pending.

About Synplicity
Synplicity® Inc. (Nasdaq: SYNP) is a leading supplier of innovative synthesis, verification and physical implementation software solutions that enable the rapid and effective design and verification of semiconductors. Synplicity’s high-quality, high-performance tools significantly reduce costs and time-to-market for FPGA, Structured/Platform ASIC and cell-based/COT ASIC designers. The company’s underlying Behavior Extracting Synthesis Technology® (BEST™), which is embedded in its logical, physical and verification tools, and has led to Synplicity’s top position in FPGA synthesis, now provides the same fast runtimes and quality of results to ASIC and COT customers. The company’s fast, easy-to-use products support industry standard design languages (VHDL and Verilog) and run on popular platforms. Synplicity employs over 280 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, Calif.

Forward-Looking Statements
This press release contains forward-looking statements including, but not limited to, statements regarding the significance of U.S. patent 6,734,472 and the performance, achievements and benefits of Synplicity’s proprietary technology, including technology described by this patent. In some cases, you will be able to identify forward-looking statements by terminology such as “may,” “will,” “should,” “expects,” “believes” or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the actual significance, achievements, performance or benefits of Synplicity’s proprietary technology to differ materially from the forward-looking statements, including the performance and benefits of Synplicity’s technology relative to industry methods or standards, latent defects, design flaws or other problems with Synplicity’s technology and the growth and changing technical requirements in the programmable semiconductor market. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K for the year ended December 31, 2003 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time, including its quarterly reports on Form 10-Q. Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement.

###

Synplicity and Behavior Extracting Synthesis Technology are registered trademarks of Synplicity Inc. BEST is a trademark of Synplicity Inc. All other names mentioned herein are the trademarks or registered trademarks of their owners.

Reader Contact:
Joe Gianelli
Synplicity, Inc.
408/215-6000
jgianelli@synplicity.com

Press Contact:
Steve Gabriel
Porter Novelli
408/369-1500
steve.gabriel@porternovelli.com