Increases in the size and complexity of today’s SoCs have intensified the challenges of verification. Meeting these challenges requires advanced technologies and methodologies that ensure the highest design quality. The Synopsys suite of functional verification solutions are tightly integrated, best-in-class technologies that allow designers to find bugs quickly and easily, significantly improving the quality of the most complex designs and enabling first-pass silicon success. These tools include
VCS, the functional verification solution used by leading SoC teams;
Verdi, the Industry’s de facto debug platform for design and verification;
ZeBu, the industry’s performance and capacity leader in emulation;
Discovery Verification IP, the industry’s next-generation VIP;
MVSIM and
MVRC for multi-voltage native low-power simulation and low-power rule checking;
Certitude, for overall verification suite quality measurement and debug;
Magellan, the formal hybrid verification solution;
Leda, the static checking solution; and
HECTOR, the next-generation formal block-level consistency checker..