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Oct 18, 2011
HSPICE SIG EVENT
Hear what industry leaders say about using HSPICE in today’s most challenging designs
HSPICE TIPS WEBINAR
Reduce simulation time without compromising HSPICE gold-standard accuracy
CUSTOMEXPLORER ULTRA WEBINAR
Advanced Regression and Analysis for Mixed-Signal Verification Using CustomExplorer Ultra
CUSTOMSIM WEBINAR
Extending Digital Verification Techniques to Mixed-Signal Designs
DAC 2011: AMS DINNER VIDEOLOG
SPICE Up Your Chip: Achieving Fast, Accurate AMS Verification
News
Synopsys Collaborates with Sigrity to Accelerate Signal Integrity Analysis
eSilicon Selects Synopsys' Custom IC Design Solution and Tapes Out 28-nm Designs
LG Electronics Accelerates Analog Simulation by 10X with Synopsys CustomSim
Synopsys and GLOBALFOUNDRIES Collaborate to Deliver 65nm iPDKs
Synopsys Custom Design Solution Enables Moortec Semiconductor to Tape Out....
Synopsys and TSMC Collaborate to Deliver Custom Design Solution for 28nm....
Synopsys Advances Mixed-Signal Verification with New CustomExplorer Ultra
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All Synopsys News
Articles
Techonomic Trends Drive Verification
Multicore, Mixed Signal Tools Take Center Stage
Synopsys Introduces Discovery 2009
Synopsys Moves Tools to Multicore Hosts
Migrating Complex Networking ASIC Verification Environment
How VHDL designers can exploit SystemVerilog
Synopsys tries to organize its efforts in EDA multiprocessing
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Blogs
Analog Insights
A View from the Top: A System-Level Blog
On Verification: Software-to-Silicon
The Standards Game
Verification Martial Arts
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Success Stories
Etron Achieves First-Silicon Success of USB3.0 SoC Using Synopsys Proven Solutions
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White Papers
MOS Device Aging Analysis with HSPICE and CustomSim
Using Digital Verification Techniques on Mixed-signal SoCs with CustomSim and VCS
Automated Regression for Mixed-Signal Verification
De-risking Variation-aware Custom IC Design with Solido Variation Designer and Synopsys HSPICE
IC Validator: Physical Verification for Analog Designs
Accelerating Analog Simulation with HSPICE Precision Parallel Technology
Utilizing Digital Techniques for Analog and Mixed-Signal Verification
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Webinars
Get the Most from Your HSPICE Simulation
Avoid EM & IR-drop Effects in Custom IP Blocks
Regression and Analysis for Mixed-Signal Verification
Jitter Analysis Using HSPICE Transient Noise Techniques
Mixed-Signal Design Verification Techniques
Advances in Circuit Analysis with Custom Designer SAE
Accelerate Analog Simulation with HSPICE
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Training Courses
HSPICE Essentials
NanoSim
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