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White Papers 

PLL Noise Analysis with HSPICE RF
This white paper describes a procedure for efficiently extracting key noise measurements for a phase locked loop using HSPICE RF. The procedure has been updated to take advantage of several new and unique capabilities in HSPICE RF that can be used to accurately predict PLL steady-state and phase noise characteristics.
<div>Scott W. Wedge, Ph.D.<br>Synopsys, Inc.</div>

HSPICE Testbench Technologies for Analog & RFIC Design
Analog and RF circuits must be designed to meet a diverse set of specifications spanning a broad range of time-domain and frequency-domain performance goals.
<div>Scott Wedge, Ph.D. Sr. Staff Engineer<br>Synopsys, Inc.</div>



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