For Electronic System Virtualization (ESV) design, Synopsys Platform Architect is the SystemC-based graphical environment for capturing the entire product platform and the dash board for initiating the platform analysis functions. Platform Architect speeds the concurrent design of SoCs with embedded software, enabling users to rapidly create and validate SoC designs at the transaction-level in SystemC. Together with Synopsys Model Designer, the Synopsys system-level model libraries, and Synopsys Platform Architect enable one of the most comprehensive system-level design solution available for SystemC.

The Synopsys Virtual Platform product family delivers new tools and technologies that support the creation, distribution, and use of virtual hardware platforms for device software development and validation. Virtual hardware platforms are models of the device hardware and the environment it evolves in, and are suitable for the development and validation of an entire device software stack up to the application level. They also enable electronics companies to engage more effectively with their customers and ecosystem partners. The solution is integrated with and supports the Synopsys Electronic System Virtualization (ESV) strategy.

The Synopsys Platform Architect Model Library provides designers with high-quality, high-performance models that ease design and debug. The Library contains a collection of SystemC IP models such as embedded processors, bus simulators (including on-chip buses like AMBA and OCP), peripherals and memory. These models were developed in partnership with leading IP providers including the market leaders ARM and MIPS. In addition, the DesignWare System-Level Library provides a large number of SystemC TLM-2.0 compliant models, including TLM views of the DesignWare Interface IP.

Platform Architect's analysis tools provide textual and graphical views for the system designer, verification engineer, and software architect to analyze SoC architectures and performance, including critical items such as software execution and bus occupancy.

For architectural analysis, Platform Architect provides views to:

• Analyze cycle-accurate performance
• Study throughput and bottlenecks
• Look at bus switching and cache usage to reduce power
• Optimize bus & memory architecture

For the case of functional analysis, Platform Architect provides views to:

• Look at system response and task scheduling
• Analyze processor loading to drive partitioning
• Profile software for optimization
• Cross-correlate different views to extract powerful information

Analysis views can be configured at run-time using SystemC Explorer (a platform Architect feature), enabling the user to decide on the data that is captured. The visualization environment allows the user to see the default graphical views dynamically during simulation or during post-processing to identify bottlenecks in the design. Views can be re-configured as required and data from multiple simulations can be grouped together for easy comparison of candidate architectures.

Synopsys Virtual Prototype
Hardware/Software Integration and Testing

Highlights:

• Faster edit-compile-debug cycles through more controllability, more observability and more determinism
• Near or faster than real-time execution
• Non-intrusive, multicore debugging and analysis environment
• Integration of existing commercial, open source or proprietary software development tools
• Integration of external applications such as realistic user interfaces and environment models
• Immediate availability worldwide--you can send a virtual hardware prototype as an e-mail attachment

Companies designing and developing processor centric, software intensive products are increasingly demanding that their software development, integration and test teams shorten development cycles, increase product quality and reduce costs. To address these challenges, development teams need to address existing limitations of the software development process such as the availability of the physical hardware, the limited control and traceability offered by the physical hardware and the complexity and difficulty of accessing product test benches.

Synopsys Virtual Prototypes are fast, executable simulations of the device hardware and the environment it evolves in. They address the limitations of the software execution environment currently available to development teams.

Early availability:
Virtual Prototypes are available before the prototype board. They can represent the entire system, a subsystem or simply a set of relevant software development functionality (for example, a core with the set of peripherals needed for OS porting). This scalability enables software development milestones to be optimized.

Better accessibility:
As a professionally integrated software package, Virtual Prototypes can be made available worldwide very quickly. They provide a simplified development environment executable on the developer's desktop.

Increased productivity:
Synopsys Virtual Prototypes, unlike physical hardware, provide observability and controllability on the entire prototype including core, interconnects and peripherals, resulting in faster edit-compile-debug cycle productivity. In addition, the system execution is deterministic and the debugging can be done in a non-intrusive way.

Synopsys Virtual Prototypes remove the dependency on hardware availability, enable the software developer to be more productive and simplify the development environment resulting in better products designed faster. In addition, Virtual Prototypes can be distributed between development teams as well as customers resulting in your products getting better designed into your customer's product--sooner.