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SNUG India |
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ITC Gardenia
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Bangalore, India
June 13-14, 2012
SNUG India is your opportunity to learn, share and engage with your fellow Synopsys technology users. In addition to an exceptional technical program that will give you practical information you can apply to your current project or use to jump-start your next design, SNUG also offers plenty of opportunities to share experiences, network with other users and meet with Synopsys experts to learn about the newest products and preview future technology direction. |
| | User paper submissions are currently in peer review. Authors can expect to receive a status update by March 5, 2012. |
| Required Templates | |
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| Dates to Remember |
| 23 January 2012 |
Call for papers opens |
| 20 February 2012 |
Call for papers closes |
| 5 March 2012 |
Preliminary acceptance notification |
| 26 March 2012 |
Draft paper due |
| 16 April 2012 |
Final paper due |
| 30 April 2012 |
Final acceptance notification |
| 14 May 2012 |
Draft slides due |
| 28 May 2012 |
Final slides due |
| 13 - 14 June 2012 |
SNUG India 2012 | |
| SNUG India
23-24 June 2011
Conference Schedule |
With nearly 2,700 users in attendance SNUG India has once again proven to be the largest technical conference in the semiconductor space in the region. Users valued this opportunity to exchange ideas with peers and product experts while attending the 38 user presentations, 16 tutorials and 2 vision sessions.
We hope to see you at SNUG India 2012! |
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| SNUG India Proceedings |
Check out the proceedings library to locate user papers or tutorials that contain solutions you can apply to your own design challenges. |
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| 1st Place - Best Paper; Custom Design and AMS Verification | User: Enabling Efficient AMS Co-simulation of Mixed-signal SoC with Analog and Power Management Integration
Pooja Sundar, Lakshmanan Balasubramanian, Sandeep Tare [Texas Instruments], Charles Jiang [Synopsys]
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| 1st Place - Best Paper; FPGA Design | User: High-Speed Prototyping Techniques for Multi FPGA Prototypes of Complex SoCs
Ameet Bagwe, Kanad Kanhere [Texas Instruments]
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| 1st Place - Best Paper; IC Design: Signoff | User: Enabling Accurate Timing Budget Parameter Measurements for DDR Critical Paths
Vidit Babbar [Texas Instruments]
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| 1st Place - Best Paper; IC Design: Synthesis & Test | User: Launch-Off Extra Shift (LOES) Transition Fault ATPG Methodology
Milan Shetty, Swathi G, Rubin A. Parekhji [Texas Instruments]
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| 1st Place - Best Paper; IC Physical Design | User: A Smart Step Density Flow for SoC Design
Madan Lal, Veerakumar Pitchiah [Intel]
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| 1st Place - Best Paper; IC Verification | User: Jitter Modeling in RTL Simulation - A Way to Ensure 1st Pass Silicon
Vidit Babbar, Arvind Kumar, Kalpesh Shah, Vikas Lakhanpal [Texas Instruments]
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| Proceedings | Download 2011 proceedings
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| | The Designer Community Expo (DCE) featured 21 design enablement companies, spanning seven design communities, showcasing their products integrated with Synopsys solutions in support of our mutual customers’ design challenges as the backdrop to this networking event. |
We are currently confirming our 2012 Technical Committee members.
The Technical Committee members from SNUG India 2011 are listed below.
SNUG thanks the members of the Technical Committee who volunteer their time and expertise to ensure SNUG’s technical quality, local perspective and value to the users of Synopsys tools and technology.
IC Verification:
Desikan Srinivasan, ARM
Ashok Natarajan, Broadcom Corporation
Atul Gadgil, LSI Corporation
IC Design - Signoff:
Renuka Deshpande, STMicroelectronics
Anurag Jain, Broadcom Corporation
Adarsh Kalliat, NVIDIA Corporation
IC Design - Synthesis & Test:
Shirish Agrawal, ST-Ericsson
Rajiv Nadig, Analog Devices
Saket Chauhan, LSI Corporation
Danish Hasan Syed, STMicroelectronics
Prashant Shrivastava, Open-Silicon
Srivaths Ravi, Texas Instruments |
IC Design - Physical Design:
Jacob Mathews, LSI Corporation
Sumit Goswami, Intel
Rajesh Bajaj, STMicroelectronics
Bipasha Ghosh, Marvell Semiconductors Inc.
FPGA Design:
Phaneesh H, Xilinx , Inc.
Vipin Verma, Freescale Semiconductor
Custom Design & AMS Verification:
Shanmukh Rao, LSI Corporation
Ashok Mishra, Qualcomm
Chittoor Parthasarathy, STMicroelectronics
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We are currently confirming our 2012 Judges.
The Judges from SNUG India 2011 are listed below.
Senior members of the VLSI community who jointly award the best paper award for each track..
IC Verification:
Sudhakar Palisetti, Cortina Systems, Inc.
Krishnaraj Rao, NVIDIA Corp.
Sanjay Budholiya, Marvell Semiconductors Inc.
IC Design - Signoff:
Anurag Jain, Broadcom Corporation
J Raghuram, Open-Silicon
Manoj Goel, Intel
IC Design - Synthesis & Test:
Prashant Shrivastava, Open-Silicon
Shrinivas MV, Analog Devices
Prasad AVSS, Lantiq |
IC Design - Physical Design:
Jacob Mathews, LSI Corporation
Manoj Gunwani, Achronix Semiconductor
Sundar Raman Ramani
FPGA Design:
Suresh Krishnamoorthy, Open-Silicon
R. Ravishankar, Intel
Custom Design & AMS Verification:
Jayanta Lahiri, ARM
Suhas Kulhalli, Broadcom Corporation
Raman Rengarajan, Advanced Micro Devices, Inc. |
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