ARM, the industry's leading provider of 16/32-bit embedded RISC microprocessor solutions, and Synopsys, the technology leader for complex IC design, have teamed together for several years with R&D partnerships to address designers' leading-edge challenges for system-on-chip (SoC) design.

32/28nm Enablement Delivered
Synopsys, the Common Platform (IBM, Samsung and GLOBALFOUNDRIES) and ARM have delivered the industry’s first complete vertically optimized design platform for 32/28nm development. Several years of collaboration between the companies led to this new advancement in SoC design.

The RTL-to-GDSII implementation solution reduces risk and total design costs for optimized 32/28nm HKMG ARM Cortex processor-based SoC designs. The platform includes:

• ARM® Cortex™ high-performance, low-power processor architecture and optimized suite of physical IP including standard cells, power management kit, memory compilers and interface IP, for the 32/28nm HKMG process
• Synopsys Lynx Design System, enabled by the Galaxy™ Implementation Platform with IC Validator In-Design physical verification, and the Synopsys DesignWare® portfolio of interface IP.
• 10 test chips produced through the three-way collaboration in 32 and 28nm HKMG process technology. Producing these chips has helped validated the design platform, including Common Platform PDKs, ARM Physical IP and Cortex processors, Synopsys Interface IP, core tool enablement and design methodology for accelerating silicon success.
• Collaborating to synchronize semiconductor manufacturing facilities for the manufacture 28nm low-power HKMG semiconductors for a new generation of mobile devices, providing the flexibility of multi-sourcing based on the planned synchronization of fabs by members of the Common Platform alliance (IBM, Samsung and GLOBALFOUNDRIES).

Videos about our collaboration

Access Innovation – 32/28nm Design Solution Delivered At DAC 2010, ARM, IBM, Samsung, GLOBALFOUNDRIES and Synopsys executives outlined the technology and tools integrated into the system.

Vertically Optimized Solution Video From SNUG 2010, ARM, IBM, Samsung and Synopsys executives talk that current development this new solution offers.

Low Power Design

• Designers of energy efficient devices are requiring increasing performance as well. ARM and Synopsys have collaborated to deliver high-performance methodology (with low power) for Cortex-A8 and Cortex-A9 processors.
• Low power verification experts from ARM, Renesas, and Synopsys, together with contributors from more than 30 companies, have collaborated to create the "Verification Methodology Manual for Low Power" (VMM-LP). Built on the widely adopted VMM methodology, VMM-LP includes a book as well as low power extensions to the VMM base classes and applications.



• In partnership, ARM and Synopsys have built on their extensive low power collaborative research and silicon technology demonstrators to create the Low Power Methodology Manual (LPMM) for SoC Design, published by Springer. The LPMM enables designers to adopt aggressive power management techniques.


• Focused on leakage management, the Synopsys-ARM Low power Technology (SALT) technology demonstrator SoC showed more than 96% leakage power savings.
• Concurrent with the launch of the LPMM, ARM and Synopsys announced an enhanced implementation Reference Methodology (iRM) incorporating the LPMM techniques for aggressive power management of the ARM1176JZF-S processor subsystem.
• The LPMM Chinese language edition was announced in a press release by Peking University Microprocessor Research and Development Center (MPRC) and Peking University Press.
• ARM and Synopsys formed an exclusive collaboration to deliver a low-power implementation solution for ARM's Intelligent Energy Manager™ (IEM) technology through the proven multi-voltage, multi-frequency Galaxy™ design flow.


• ARM recommends the jointly developed iRM for implementing ARM IEM-enabled cores, enabling easy adoption of this innovative system-level energy saving solution.
• The collaboration proved the IEM technology in SoCs manufactured at multiple foundries, demonstrating up to 65% energy savings.
• ARM, Renesas Technology and Synopsys have collaborated to define the industry’s first low power verification methodology. Planned for availability in the fall of 2008, it will be published in book form and also include free a SystemVerilog base class library (which builds on the VMM base classes) under an Apache 2.0 license. More information is available at www.vmmcentral.org.

Reference Methodologies

• ARM delivers the ARM-Synopsys Galaxy Implementation Reference Methodology (iRM) for RTL-to-GDSII hardening of all soft ARM microprocessor cores. Jointly developed by Synopsys and ARM, the iRM takes advantage of the latest tools including IC Compiler and DC Topographical technology.
• The iRM for ARM's Cortex-A8, highest performance CPU, delivers 5-10X productivity increase with excellent power, performance and area.
• The Synopsys SVP Café directory provides a comprehensive list of ARM processor cores and their support for Synopsys complete design flow.

Libraries And Verification

• ARM's Artisan® Metro™, Advantage™ and Advantage-HS power-aware, multi-voltage libraries, as well as the Power Management Kit (PMK) for these libraries, were developed in close collaboration between the companies.
• Synopsys DesignWare® Library includes synthesizable and verification components for AMBA™ 2 AHB/APB and AMBA 3 AXI interconnect. The coreAssembler tool is also included in DesignWare Library, automating the process of configuring, assembling, implementing and verifying an AMBA bus-based subsystems.
• ARM and Synopsys have jointly developed a reference verification methodology based on SystemVerilog and co-authoring the SystemVerilog Verification Methodology Manual - a "how-to" book on advanced verification techniques using SystemVerilog.
                  
• A joint system-level design solution enables software development and verification of ARM processor-based SoCs.
• The Synopsys SVP Café directory provides a comprehensive list ARM Artisan physical IP (libraries) along with their support for Synopsys’ complete design flow.

Professional Services

• Synopsys Professional Services co-developed the ARM-Synopsys Reference Methodology and IEM Reference Methodology, and has extensive experience hardening and integrating ARM cores in SoCs.